Jacob Savir

Jacob Savir is a Professor in the Department of Electrical and Computer Engineering[1] at the New Jersey Institute of Technology and an IEEE Fellow.[2]

Jacob Savir
Alma materTechnion – Israel Institute of Technology (B.Sc., 1968; M.Sc., 1974)
Stanford University (M.S., 1976; Ph.D., 1978)
Awards
Scientific career
InstitutionsNew Jersey Institute of Technology
Websiteweb.njit.edu/~savir/savir.htm

He is credited with developing two approaches to detecting Transition Faults (a type of Fault model) that might occur during the manufacturing of semiconductor chips, viz., the Skewed-Load Transition Test (Launch-off-shift at-speed test) and the Broad-side delay test (Launch on Capture at-speed test).

Education

Savir completed his B.Sc. and M.Sc. in Electrical Engineering from Technion – Israel Institute of Technology in 1968 and 1974 respectively. He then obtained his MS in Statistics and PhD in Electrical Engineering from Stanford University in 1976 and 1978 respectively.

He worked as a researcher at IBM for nearly two decades after his PhD (1978-1996).

Research contributions to DFT

In 1992, Savir wrote the seminal paper on Skewed-Load Transition Test[3] better known in the Design for testing industry as Launch-off-shift at-speed test.

In 1994, he co-authored the paper on Broad-side delay test.[4]

References
  1. Dr. Jacob Savir's Homepage
  2. "IEEE Fellows Directory". IEEE. Retrieved 4 December 2016.
  3. Skewed-Load Transition Test: Part I, Calculus.
  4. Broad-side delay test
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