ARM Cortex-A76

The ARM Cortex-A76 is a microarchitecture implementing the ARMv8.2-A 64-bit instruction set designed by ARM Holdings' Austin design centre. ARM states a 25% and 35% increase in integer and floating point performance, respectively, over a Cortex-A75 of the previous generation. [2]

ARM Cortex-A76
General information
Launched2018[1]
Designed byARM Holdings
Performance
Max. CPU clock rateto 3.0 GHz in phones and 3.3 GHz in tablets/laptops 
Address width40-bit
Cache
L1 cache128 KiB (64 KiB I-cache with parity, 64 KiB D-cache) per core
L2 cache128-512 KiB per core
L3 cache512-4 MiB (optional)
Architecture and classification
ArchitectureARMv8-A
MicroarchitectureARM Cortex-A76
Instruction setA64, A32, and T32 (at the EL0 only)
Extensions
Physical specifications
Cores
  • 1–4 per cluster
Co-processorArm Cortex-A55 (optional)
Products, models, variants
Product code name(s)
  • Enyo
Variant(s)Arm Neoverse N1
History
PredecessorARM Cortex-A75
ARM Cortex-A73
ARM Cortex-A72
SuccessorARM Cortex-A77

Design

The Cortex-A76 serves as the successor of the ARM Cortex-A73 and ARM Cortex-A75, though based on a clean sheet design.

The Cortex-A76 frontend is a 4-wide decode out-of-order superscalar design. It can fetch 4 instructions per cycle. And rename and dispatch 4 Mops, and 8 µops per cycle. The out-of-order window size is 128 entries. The backend is 8 execution ports with a pipeline depth of 13 stages and the execution latencies of 11 stages.[2][3]

The core supports unprivileged 32-bit applications, but privileged applications must utilize the 64-bit ARMv8-A ISA.[4] It also supports Load acquire (LDAPR) instructions (ARMv8.3-A), Dot Product instructions (ARMv8.4-A), PSTATE Speculative Store Bypass Safe (SSBS) bit and the speculation barriers (CSDB, SSBB, PSSBB) instructions (ARMv8.5-A).[5]

Memory bandwidth increased 90% relative to the A75.[6][7] According to ARM, the A76 is expected to offer twice the performance of an A73 and is targeted beyond mobile workloads. The performance is targeted at "laptop class", including Windows 10 devices,[8] competitive with Intel's Kaby Lake.[9]

The Cortex-A76 support ARM's DynamIQ technology, expected to be used as high-performance cores when used in combination with Cortex-A55 power-efficient cores.[2]

Neoverse N1

On February 20, 2019, Arm announced the Neoverse N1 microarchitecture (code named Ares) based on the Cortex-A76 redesigned for infrastructure/server applications. The reference design supports up to 64 or 128 Neoverse N1 cores.[10][11]

Notable changes from the Cortex-A76:

  • Coherent I-cache and D-cache with 4-cycle LD-use
  • L2 cache: 512-1024 KiB per core
  • Mesh interconnect instead of 1-4 cores per cluster

Licensing

The Cortex-A76 is available as SIP core to licensees, and its design makes it suitable for integration with other SIP cores (e.g. GPU, display controller, DSP, image processor, etc.) into one die constituting a system on a chip (SoC).

Usage

The Cortex-A76 was first used in the HiSilicon Kirin 980.[12]

ARM has also collaborated with Qualcomm for a semi-custom version of the Cortex-A76, used within their high-end Kryo 495 (Snapdragon 8cx)/Kryo 485 (Snapdragon 855 and 855 Plus), and also in their mid-range Kryo 460 (Snapdragon 675) and Kryo 470 (Snapdragon 730) CPUs. One of the modifications Qualcomm made was increasing reorder buffer to increase the out-of-order window size.[13]

It is also used in the Exynos 990 and Exynos Auto V9.[14] And the MediaTek Helio G90/G90T and Dimensity 800 and Dimensity 820. And the HiSilicon Kirin 985 5G and Kirin 990 4G/990 5G/990E 5G.[15][16][17]

The Cortex-A76 can be found in Snapdragon 855 as Big-core.

See also

References
  1. Shrout, Ryan; Moorhead, Patrick (31 May 2018). "Ep 23 - 5/31/18 - The Future of Arm with Nandan Nayampally". The Tech Analysts Podcast. Retrieved 1 June 2018.
  2. Frumusanu, Andrei (31 May 2018). "Arm Cortex-A76 CPU Unveiled". Anandtech. Retrieved 1 June 2018.
  3. "Arm Unveils Cortex-A77, Emphasizes Single-Thread Performance". WikiChip Fuse. 2019-05-26. Retrieved 2020-06-18.
  4. Williams, Chris (31 May 2018). "Arm emits Cortex-A76 – its first 64-bit-only CPU core (in kernel mode)". The Register. Retrieved 1 June 2018.
  5. "ARM documentation set for Cortex-A76". infocenter.arm.com. Retrieved 2019-06-15.
  6. Armasu, Lucian (31 May 2018). "Arm's Cortex-A76 Could Be The First True Challenger To x86 Chips On Laptops". Tom's Hardware. Retrieved 1 June 2018.
  7. Triggs, Robert (31 May 2018). "Arm Cortex-A76 CPU deep dive". Android Authority. Retrieved 1 June 2018.
  8. Hruska, Joel (31 May 2018). "ARM's New Cortex-A76 SoC Targets Windows Laptop Market". Extreme Tech. Retrieved 1 June 2018.
  9. Bright, Peter (1 June 2018). "ARM promises laptop-level performance in 2019". Ars Technica. Retrieved 1 June 2018.
  10. Frumusanu, Andrei. "Arm Announces Neoverse N1 & E1 Platforms & CPUs: Enabling A Huge Jump In Infrastructure Performance". www.anandtech.com. Retrieved 2020-06-17.
  11. "Arm Launches New Neoverse N1 and E1 Server Cores". WikiChip Fuse. 2019-02-20. Retrieved 2020-06-17.
  12. Frumusanu, Andrei. "HiSilicon Announces The Kirin 980: First A76, G76 on 7nm". www.anandtech.com. Retrieved 2020-11-13.
  13. Frumusanu, Andrei. "Arm's New Cortex-A77 CPU Micro-architecture: Evolving Performance". www.anandtech.com. Retrieved 2019-06-16.
  14. "Exynos 990 Mobile Processor: Specs, Features | Samsung Exynos". Samsung Semiconductor. Retrieved 2020-06-18.
  15. MediaTek (2020-06-18). "MediaTek Helio G90 Series". MediaTek. Retrieved 2020-06-18.
  16. MediaTek (2020-06-18). "MediaTek Dimensity 800". MediaTek. Retrieved 2020-06-18.
  17. MediaTek (2020-06-18). "MediaTek Dimensity 820". MediaTek. Retrieved 2020-06-18.
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