Cache coherent interconnect for accelerators
The cache coherent interconnect for accelerators (CCIX) protocol is the result of an effort of a joint group of computer, hardware and software component vendors: AMD, ARM, Huawei, Mellanox Technologies, Qualcomm and Xilinx.[1]
Quotes from the homepage:
- The mission of the CCIX Consortium is to develop and promote adoption of an industry standard specification to enable coherent interconnect technologies between general-purpose processors and acceleration devices for efficient heterogeneous computing.
- The CCIX standard is available to member companies with initial products expected in 2017.
References
- Jeff Defilippi (October 11, 2016). "How do AMBA, CCIX and GenZ address the needs of the data center?". ARM Community blog. Retrieved March 30, 2017.
External links
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Interfaces are listed by their speed in the (roughly) ascending order, so the interface at the end of each section should be the fastest.  Category | |
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