Intel 80486SX

In the early 1990s, common applications did not need or benefit from an FPU. Among the rare exceptions were CAD applications, which could often simulate floating point operations in software, but benefited from a hardware floating point unit immensely. AMD had begun manufacturing its 386DX clone which was faster than Intel's. To respond to this new situation Intel wanted to provide a lower cost i486 CPU for system integrators, but without sacrificing the better profit margins of a "full" i486. This was accomplished through a debug feature called Disable Floating Point (DFP), by grounding a certain bond wire in the CPU package. The i486SX was introduced in mid-1991 at 20 MHz in a PGA package. Later (1992) versions of the i486SX had the FPU entirely removed for cost-cutting reasons and comes in surface-mount packages as well.[1]

Many systems allowed the user to upgrade the i486SX to a CPU with the FPU enabled. The upgrade was shipped as the i487, which was a full-blown i486DX chip with an extra pin. The extra pin prevents the chip from being installed incorrectly. The NC# pin, one of the standard 168 pins, was used to shut off the i486SX.[1] Although i486SX devices were not used at all when the i487 was installed, they were hard to remove because the i486SX was typically installed in non-ZIF sockets or in a plastic package that was surface mounted on the motherboard. Later OverDrive processors also plugged into the socket and offered performance enhancements as well.

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  Pin side of an Intel i486 SX
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  Embedded i486SX (SQFP version).
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  BQFP version.

• Intel 80486SX images and descriptions at cpu-collection.de

Intel Datasheets

• Embedded i486SX
• Embedded Ultra-Low Power i486SX