PowerPC G4

The PowerPC 7400 (code-named "Max") debuted in August 1999 and was the first processor to carry the "G4" moniker. The chip operates at speeds ranging from 350 to 500 MHz and contains 10.5 million transistors, manufactured using Motorola's 0.20 μm HiPerMOS6 process. The die measures 83 mm² and features copper interconnects.

Motorola had promised Apple to deliver parts with speed up to 500 MHz, but yields proved too low initially. This forced Apple to take back the advertised 500 MHz models of PowerMac G4. The Power Mac series was downgraded abruptly from 400, 450, and 500 MHz processor speeds to 350, 400, and 450 MHz while problems with the chip were ironed out. The incident generated a rift in the Apple-Motorola relationship, and reportedly caused Apple to ask IBM for assistance to get the production yields up on the Motorola 7400 series line.[1] The 500 MHz model was reintroduced on February 16, 2000.

The PowerPC 7410 "Nitro" is a low-power version of the 7400 but it was manufactured at 180 nm instead of 200 nm. Like the 7400 it has 10.5 million transistors. It debuted in the PowerBook G4 on 9 January 2001.

The chip added the ability to use all or half of its cache as high-speed, non-cached memory mapped to the processor's physical address space as desired. This feature was used by embedded systems vendors such as Mercury Computer Systems.

An 800 MHz Motorola PowerPC 7450 on a Power Mac G4 CPU module

PowerPC G4e design

The PowerPC 7450 "Voyager"/"V'ger" was the only major redesign of the G4 processor. The 33-million transistor chip extended significantly the execution pipeline of 7400 (7 vs. 4 stages minimum) to reach higher clock speeds, improved instruction throughput (3 + branch vs. 2 + branch per cycle) to compensate for higher instruction latency, replaced an external L2 cache (up to 2 MB 2-way set associative, 64-bit data path) with an integrated one (256 KB 8-way set associative, 256-bit data path), supported an external L3 cache (up to 2 MB 8-way set associative, 64-bit data path), and featured many other architectural advancements. The AltiVec unit was improved with the 7450; instead of executing one vector permute instruction and one vector ALU (simple int, complex int, float) instruction per cycle like 7400/7410, the 7450 and its Motorola/Freescale-followers can execute two arbitrary vector instructions simultaneously (permute, simple int, complex int, float). It was introduced with the 733 MHz Power Mac G4 on 9 January 2001. Motorola followed with an interim release, the 7451, codenamed "Apollo 6", just like the 7455. Early AmigaOne XE computers were shipped with the 7451 processor.

The enhancements to the 745x design gave it the nicknames G4e or G4+ but these were never official designations.

A 1.25GHz Sample 7445 EVT prototype on an iMac G4 DVT model

The PowerPC 7455 "Apollo 6" was introduced in January 2002. It came with a wider, 256-bit on-chip cache path, and was fabricated in Motorola's 0.18 μm (180 nm) HiPerMOS process with copper interconnects and SOI. It was the first processor in an Apple computer to pass the 1 GHz mark. The 7445 is the same chip without the L3 cache interface. The 7455 is used in the AmigaOne XE G4, and the dual 1 GHz Power Mac G4 (Quicksilver 2002)

The PowerPC 7447 "Apollo 7" is slightly improved from the 7450/55, it has a 512 KB on-chip L2 cache and was manufactured in a 130 nm process with SOI, hence drawing less power. It has 58 million transistors. With the 7447A, which introduced an integrated thermal diode as well as DFS (dynamic frequency scaling) Freescale was able to reach a slightly higher clock. The 7457 has an additional L3 cache interface, supporting up to 4 MB of L3 cache, up from 2 MB supported by the 7455 and 7450. However, its frequency scaling stagnated when Apple chose to use the 7447 instead of the 7457, despite that the 7457 was the L3 cache-enabled successor to the L3 cache-enabled 7455 that Apple used before.

The only companies that offer the 7457 in the form of upgrades for the Power Mac G4, iMac G4, and Power Mac G4 Cube are Giga Designs, Sonnet Technology, Daystar Technology (they use the 7457 only for iMac G4 upgrades) and PowerLogix. The Pegasos computer platform from Genesi also uses 7447 in its Pegasos-II/G4.

The 7457 is often used to repair an AmigaOne XE CPU module;[2][3][4][5] some AmigaOS software with the 7457 installed may mistake the AmigaOne for a Pegasos II computer as there were never any official 7457 boards released by Eyetech.

The PowerPC 7448 "Apollo 8" is an evolution of the PowerPC 7447A announced at the first Freescale Technology Forum in June 2005. Improvements were higher clock rates (up to 1.7 GHz) officially and easily up to 2.4 GHz through overclocking, a larger 1 MB L2 cache, a faster 200 MHz front side bus, and lower power consumption (18 W at 1.7 GHz). It was fabricated in a 90 nm process with copper interconnects and SOI.

PowerPC 7448 users were:

• Daystar for their High-Res Aluminum PowerBook G4 upgrades (Daystar's Low-Res Aluminum PowerBook G4 upgrades used the 7447A, not the 7448)
• NewerTech for their Power Mac G4 upgrades
• PowerLogix for their Power Mac G4 Cube upgrade
• Cisco in NPE-G2 network processor module for their 7200VXR routers [6]
• Cisco 7201 Router [7]
• Extreme Engineering Solutions for their XPedite6244 single board computer [8]
• Aitech for their C104 CompactPCI single board computer [9]
• Emerson Network Power for their PmPPC7448 PMC module [10]

In 2004, Freescale renamed the G4 core to e600 and changed its focus from general CPUs to high-end embedded SoC devices, and introduced a new naming scheme, MPC86xx. The 7448 was to be the last pure G4 and it formed the base of the new e600 core with a seven-stage, three-issue pipeline, and a powerful branch prediction unit which handles up to sixteen instructions out-of-order. It has an enhanced AltiVec unit capable of limited out-of-order execution and a 1 MB L2 cache.

This list is a complete list of known G4 based designs (excluding newer core e600 designs). The pictures are illustrations and not to scale.

Name	Manufacturer	Image	Fab	Transistors	Die size	Cores	Clock	L2 cache	L3 cache	Package	Introduced
MPC7400	Motorola		0.20 μm	10.5 M	83 mm2	1	350–500 MHz	512–2048 kB off die	n/a	360 pin CBGA	1999
06K5319 10K8298	IBM		0.18 μm	10.5 M		1	400–500 MHz	512–2048 kB off die	n/a	360 pin CBGA	2000
MPC7410	Motorola Freescale		0.18 μm	10.5 M	52 mm2	1	400–550 MHz	512–2048 kB off die	n/a	360 pin CBGA 360 pin CLGA	2001
MPC7450 MPC7451	Motorola		0.18 μm	33 M	106 mm2	1	500–867 MHz	256 kB	0–2 MB off die	483 pin CBGA	2001
MPC7440 MPC7441	Motorola		0.18 μm	33 M	106 mm2	1	500–800 MHz	256 kB	n/a	360 CBGA	2001
MPC7455	Motorola		0.18 μm SOI	33 M	106 mm2	1	600–1420 MHz	256 kB	0–2 MB off die	483 pin CBGA	2002
MPC7445	Motorola		0.18 μm SOI	33 M	106 mm2	1	600–1420 MHz	256 kB	0–2 MB off die	360 pin CBGA	2002
MPC7457	Motorola Freescale		0.13 μm SOI	58 M	98.3 mm2	1	867–1267 MHz	512 kB	0–4 MB off die	483 pin CBGA	2003
MPC7447 MPC7447/A	Motorola Freescale		0.13 μm SOI	48.6 M	83.9 mm2	1	600–1420 MHz 600–1600 MHz	512 kB	n/a	360 pin CBGA 360 pin CLGA	2003 2004
MPC7448	Freescale		90 nm SOI	90 M	58.44 mm2	1	1000–1700 MHz	1024 kB	n/a	360 pin CBGA 360pin CLGA	2005

• Diefendorff, Keith (25 October 1999). "PowerPC G4 Gains Velocity". Microprocessor Report. pp. 10–15.
• Gwennap, Linley (16 November 1998). "G4 Is First PowerPC With AltiVec". Microprocessor Report.
• Halfhill, Tom R. (5 July 2005). "PowerPC Ain't Dead Yet". Microprocessor Report. pp. 13–15.